A semiconductor memory device is provided to reduce read backward flow phenomenon or write attenuation phenomenon by controlling the voltage of a local global input/output selection signal during a data read or write operation. A plurality of memory cell array blocks comprises a plurality of memory cells connected between word lines and bit line pairs. A bit line selection part transmits data between the selected bit line pair and the local input/output line pair in response to a signal applied to a column selection line. A local global input/output gate part transmits data between the local input/output line pair and the global input/output line pair in response to a local global input/output selection signal. A data input/output part inputs and outputs data with the global input/output line pair. A local global input/output control part(200) controls the voltage level of the local global input/output selection signal differently during a read or write operation.
