发明名称 Stochastic reset circuit
摘要 In one embodiment, an integrated circuit device includes a power on reset (POR) circuit and a stochastic reset circuit configured to control enabling and disabling of the POR circuit. The stochastic reset circuit may have a value from among many possible values. The POR circuit may be enabled during a power up sequence of the device when the value of the stochastic reset during the power up is not a value designated to allow disabling of the POR circuit. The stochastic reset circuit may be configured such that the probability of the POR circuit being disabled during the power up is extremely low. After the power up sequence, the stochastic reset circuit may be controlled to allow disabling of the POR circuit to conserve power.
申请公布号 US7265595(B1) 申请公布日期 2007.09.04
申请号 US20060367139 申请日期 2006.03.03
申请人 CYPRESS SEMICONDUCTOR CORPORATION 发明人 KUTZ HAROLD;WILLIAMS TIMOTHY;WHATELY MORGAN
分类号 H03L7/00 主分类号 H03L7/00
代理机构 代理人
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