发明名称 List based method and apparatus for selective and rapid cache flushes
摘要 An apparatus and a method for rapidly flushing a cache memory device, including a list structure to track changes in a cache, which may be implemented on the processor die separate from the cache memory. The list structure allows for access to a relatively small store of data to determine whether or not a cache entry needs to be written to the main memory. Choosing the format of the list structure, allows one to make tradeoffs between area needed on a chip and the amount of efficiency in the cache flushing process.
申请公布号 US7266647(B2) 申请公布日期 2007.09.04
申请号 US20050280585 申请日期 2005.11.15
申请人 INTEL CORPORATION 发明人 MOSUR LOKPRAVEEN B.;BALIGA HARIKRISHNA B.
分类号 G06F12/00;G06F12/08 主分类号 G06F12/00
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