| 摘要 |
The proposed digital self-compensator contains a unit for processing an in-phase signal component, a unit for processing a quadrature signal component, a timing unit, an adder with three inputs, and additionally, for the purpose to enhance efficiency in suppressing interferences, multipliers and a unit for generating a control signal for an automatic gain control unit. Each signal processing unit contains an automatic gain control unit, a multiplier, and a correlation feedback unit. Each correlation feedback unit contains a digital switching unit, a code analyzer, and a unit for generating a quadrature component of the control signal for the automatic gain control unit.
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