| 摘要 |
A digital DLL circuit includes: a first register configured to hold a delay specifying value to specify a delay; a second register configured to specify a correction value for a gate delay inside an LSI; a digitally-controlled variable delay circuit; and a control circuit configured to produce a delay control value to implement control so that a delay by the variable delay circuit is kept at the delay specifying value of the first register. The digital DLL circuit further includes an adder circuit configured to add a gate delay correction value held by the second register to the delay control value output from the control circuit, and output a resultant value to a control input of the variable delay circuit.
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