发明名称 |
METHOD OF FORMING AN ISOLATION LAYER OF THE FIN TYPE FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE FIN TYPE FIELD EFFECT TRANSISTOR USING THE SAME |
摘要 |
A method for fabricating an isolation layer of a fin-type FET is provided to remarkably decrease the number of process for fabricating a fin-type FET by forming isolation layers having different steps in the peripheral and cell regions of a substrate by a minimized process. A substrate(100) divided into a cell region and a peripheral region that are exposed to an opening of a hard mask pattern is etched to form a trench so that a silicon fin(110) is defined by the trench to be guaranteed as the channel region of the fin-type transistor. A liner layer(112) having substantially the same thickness is formed on the bottom and the top surfaces of the trench and on the surface of the hard mask pattern. A planarized insulation layer is formed to fill the trench having the liner layer. A photoresist pattern is formed to cover the insulation layer in the peripheral region. A part of the insulation layer in the cell region is firstly wet-etched to form an insulation layer pattern. The photoresist pattern is removed. While the liner layer and the hard mask pattern are removed by a second wet-etch process, the insulation layer in the cell region and a part of the upper part of the insulation layer pattern in the cell region are etched to form isolation layers(120a,120b) having different heights in the peripheral and cell regions.
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申请公布号 |
KR20070082921(A) |
申请公布日期 |
2007.08.23 |
申请号 |
KR20060015969 |
申请日期 |
2006.02.20 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
SONG, EUN BONG;JEON, JEONG SIC;AHN, TAE HYUK;KIM, DONG HYUN |
分类号 |
H01L21/76;H01L21/336 |
主分类号 |
H01L21/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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