| 摘要 |
PROBLEM TO BE SOLVED: To provide a technique capable of suppressing extension of the time for reading of data from a main memory, in a multiprocessor system comprising each processor provided with a cache memory, and suppressing latency increase of memory access in the whole multiprocessor system. SOLUTION: The cache memory system comprises a first cache memory, a second cache memory, a first cache controller, and a second cache controller. The first and second cache controllers is connected with each other and also connected to the main memory, respectively. The first cache controller determines, upon receipt of a reading request of data from a first processor, whether the data is stored in the first cache memory or not, and transmits, when it determines that the data is not stored therein, the reading request of data to the second controller. COPYRIGHT: (C)2007,JPO&INPIT
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