发明名称 Method and apparatus for increasing the efficiency of an emulation engine
摘要 A method and apparatus for improving the efficiency of a processor-based emulation engine. The emulation engine is composed of a plurality of processors, each processor capable of emulating a logic gate. Processors are arranged into groups of processors called clusters. Each processor receives inputs, processes the inputs, and stores the outputs in an output array. The output array allows processors within a cluster to fetch an output from a processor that was written to the output array during a previous cycle. The output array can also store and transfer data between clusters of processors. Consequently, the number of cycles that a processor or a cluster has to wait to fetch data is greatly reduced and the efficiency of the emulation engine is increased.
申请公布号 US2007198809(A1) 申请公布日期 2007.08.23
申请号 US20060344058 申请日期 2006.01.31
申请人 CADENCE DESIGN SYSTEMS, INC. 发明人 BEAUSOLEIL WILLIAM F.;COMFORT STEVEN T.;ELMUFDI BESHARA G.
分类号 G06F15/00 主分类号 G06F15/00
代理机构 代理人
主权项
地址