发明名称 INTERVAL TIMER DEVICE AND SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To make it possible to always generate an event signal at a constant time interval without varying the cycle of the event signal of an interval timer device even if a frequency-dividing ratio of a count clock is chamged over. SOLUTION: A frequency dividing circuit 110 performs the frequency division of an inputted clock to generate a count clock. An adder 102, an initial value register 103, a counter value selector 104 and a counter 105 constitute an upcounter to update a count value in the unit of a predetermined discrete value in synchronization with the count clock. In this case, the discrete value corresponds to a frequency division ratio in the frequency dividing circuit 110, and a discrete value selector 101 selects a predetermined value. When the count value reaches a predetermined comparison value, a comparator 107 outputs an event signal. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007214849(A) 申请公布日期 2007.08.23
申请号 JP20060032101 申请日期 2006.02.09
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YASUI JUNICHI;KAWABATA MANABU;MARUOKA TOMOHIKO
分类号 H03K17/28 主分类号 H03K17/28
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