发明名称 SYSTEM MODULE, AND DATA RELAYING METHOD
摘要 <p>In a system module used in a multiple-processor system in which a plurality of the system modules with a system controller connected with a plurality of processors through a first transmission line is connected with the multiple-processor system through a second transmission line, even when a packet cannot be received due to abnormality during a packet relay process, the system module is provided to carry out its process without stopping the entire multiple-processor system. When due to malfunction of the processing unit or the first transmission line a part of the packet constituting a series of data transmitted by the processing unit cannot be normally received, the system controller is provided with a data transmission control unit (51) for generating a complementary packet to complement the packet not properly received.</p>
申请公布号 WO2007094039(A1) 申请公布日期 2007.08.23
申请号 WO2006JP302475 申请日期 2006.02.13
申请人 FUJITSU LIMITED;MISHIMA, MASAHIRO 发明人 MISHIMA, MASAHIRO
分类号 H04L1/00;G06F13/36 主分类号 H04L1/00
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