| 摘要 |
<P>PROBLEM TO BE SOLVED: To acquire analysis data in real time without increasing LSI output PINs. <P>SOLUTION: This debug circuit 1 includes: a mode holding circuit 10 for holding times for acquiring data while an LSI logic circuit 50 is operating and selection conditions for data to be acquired; a pattern detection circuit 20 for sending out a pattern coincidence signal and a pattern assortment signal when a logic circuit state signal in the logic circuit 50 coincides with the condition of an output of the holding circuit 10; a transaction generation circuit 30 for preparing transaction headers having auxiliary codes varying with pattern assortment signals on receiving the coincidence signal and preparing user-defined message transactions provided with analysis data output from the logic circuit 50 next to the headers; and a transaction selection circuit 40 for selecting an ordinary transaction and the message transaction to output them as transaction outputs from an LSI 170. <P>COPYRIGHT: (C)2007,JPO&INPIT |
