发明名称 DECODING APPARATUS AND DECODING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a decoding apparatus which achieves high-speed decoding processing while suppressing an increase in circuit scale. SOLUTION: The decoding apparatus decodes coded data constituted of a low-density parity check code using a plurality of check matrices, and is equipped with: a pattern storage means for storing information regarding a check matrix and a partition pattern of the check matrix, the check matrix being partitioned into a plurality of row groups and a plurality of column groups, wherein an edge disposing area where an edge is disposed among the plurality of partitioned unit areas is allocated to be existent one by one for each column group in each row group; a likelihood information storage means for storing likelihood information of each code bit of the coded data while being divided into memory cells for each column group; and a plurality of edge unit calculating means each connected to the memory cell storing the likelihood information regarding a column group to which the edge disposing area belongs, and each for updating the likelihood information of the code bit based on the likelihood information stored in the memory cell to which the edge unit calculating means is connected. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007215089(A) 申请公布日期 2007.08.23
申请号 JP20060035019 申请日期 2006.02.13
申请人 FUJITSU LTD 发明人 IKEDA NORITAKA;MIYAZAKI TOSHIHARU
分类号 H03M13/19;G06F11/10 主分类号 H03M13/19
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