| 摘要 |
The present invention is directed to reduce the lowering of transmission error and power consumption which is increased with the increase in the number of samples for enhancing the characteristics and to improve the characteristics. There are serially provided 4k (k denotes a spreading factor) shift registers (1) to (4) to deal with at most four samples to develop input spread signals, which are multiplied by spread-code replica signals from a replica generator (21). Sums SIGMA 1 to SIGMA 4 of respective k products are obtained. An output of a correlator is obtained by further adding the sums. At this time, the shift registers (1) to (4), adders (41-1 to 4) and the replica generator (21) are controlled in response to a control signal depending upon the number of samples. When three samples are sampled for one chip, the shift register (4) is disabled and (1, 1, 1, -1, -1, -1, 1, 1, 1, 1, 1, 1, -1, -1, -1, NA, NA, NA, NA, NA) are prepared as a replica and only adder SIGMA 4 is disabled and an output of the correlator is obtained from signals stored in the shift registers (1), (2), (3). <IMAGE> |
