STRESS ANALYSIS METHOD, WIRING STRUCTURE DESIGN METHOD, PROGRAM, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a stress analysis method capable of attaining improvement in quality, reliability and production efficiency of a semiconductor device. SOLUTION: This method comprises steps in which: a division part divides a chip into a plurality of analysis areas (S10); a composite physical property value derivation part derives, for each of the plurality of analysis areas, a composite physical property value obtained by composing physical property values of a plurality of materials contained in the analysis area concerned, based on wiring structure data for every analysis area (S11 and S12); and a stress analysis part forms a finite element three-dimensional model having each analysis area as an element, and applies the composite physical property value to each element to perform stress analysis (S13 and S14). COPYRIGHT: (C)2007,JPO&INPIT