ASYNCHRONOUS FIFO USING VALID BIT

摘要

An asynchronous FIFO(First-In First-Out) using a valid bit is provided to perform a stable FIFO operation in a SoC(System on Chip) by solving metastability and synchronization of a counter. A valid write bit generator(120) generates a valid write bit corresponding to a write point of the FIFO. A valid read bit generator(130) generates a valid read bit corresponding to a read point of the FIFO. A full detector(160) generates a full signal if the FIFO is full by comparing the valid read bit, which is synchronized with the write point, with the valid write bit. An empty detector(170) generates an empty signal if the FIFO is empty by comparing the valid write bit, which is synchronized with the read point, with the valid read bit. A write pointer counter rotates the write pointer one by one in each write operation to an entry of the FIFO by responding to a write clock. A read pointer counter rotates the read pointer one by one in each read operation from the entry of the FIFO by responding to a read clock.