发明名称 IMAGE PROCESSOR
摘要 <P>PROBLEM TO BE SOLVED: To provide an image processor whose power consumption can be reduced more than that of prior arts by supplying power to an absolute minimum number of devices in a proper timing depending on contents of a request received through a communication means from an external device when in a power saving state. <P>SOLUTION: When the image processor receives a data processing request through its NIC 5 from the external device, an MPU of the NIC 5 and MPUs of control sections 6 to 9 control automatic changeover switches 41 to 49 for switching power application state to sub power supplies 221 to 229 so as to control power application to function blocks 3, 6 to 9, 6a, 7a, 8a to 8c on the basis of contents of the data processing request and a state of its own apparatus. When the function blocks are switched from a "no power application state" into a "power application state", the image processor carries out hierarchical power application control processing that switches the function blocks with hierarchical relationship with each other to the "power application state" sequentially from hierarchically upper function blocks to hierarchically lower function blocks. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007208822(A) 申请公布日期 2007.08.16
申请号 JP20060027229 申请日期 2006.02.03
申请人 SHARP CORP 发明人 OKADA TADASHI
分类号 H04N1/00;B41J29/38;G03G21/00 主分类号 H04N1/00
代理机构 代理人
主权项
地址