发明名称 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To restrain a decrease in yield caused by an excess film thickness of a polished layer at an outer peripheral part of a wafer. SOLUTION: This method for manufacturing a semiconductor device for processing a plurality of chip regions arranged in a matrix form in a wafer substrate comprises a process for forming a first layer (20) on the entire surface of the wafer substrate, a process for removing the first layer (20) in an outer peripheral region having a first width (W2) from the outer periphery to the center of the wafer substrate to form a level difference, a process for forming a polished layer (22) on the first layer in which a step is formed, a process for polishing the entire surface of the polished layer in the CMP method to planarize the surface, a process for forming a second layer on the planarized polished layer, and a process for patterning the second layer in a lithography process. The first width (W2) is so adjusted that the number of available chips formed in the plurality of chip regions is maximized. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007208212(A) 申请公布日期 2007.08.16
申请号 JP20060028893 申请日期 2006.02.06
申请人 FUJITSU LTD 发明人 WATANABE KEI
分类号 H01L21/3205;H01L21/304 主分类号 H01L21/3205
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