发明名称 INTERLEAVED MIRRORED MEMORY SYSTEMS
摘要 In some embodiments, a system includes a first memory assembly coupled to a first channel and a second memory assembly coupled to a second channel. The system includes a memory controller to write first and second primary data sections to the first and second memory assemblies, respectively, and write first and second redundant data sections to the second and first memory assemblies, respectively, wherein the first and second redundant data sections are redundant with respect to the first and second primary data sections, respectively. Other embodiments are described and claimed.
申请公布号 KR100750031(B1) 申请公布日期 2007.08.16
申请号 KR20057008242 申请日期 2005.05.09
申请人 发明人
分类号 G06F12/08;G06F11/20;G06F12/00;G06F13/16;G11C7/00;G11C7/10;G11C29/00 主分类号 G06F12/08
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