| 摘要 |
PROBLEM TO BE SOLVED: To provide an efficient LDPC (Low-Density Parity Check) decoding apparatus and method based on a node memory structure. SOLUTION: The present invention includes an edge memory for storing a message delivered through an edge between a variable node and a check node; a node memory for storing a check node value; a node processor which performs a node processing operation using information stored in at least one of the node memory and the edge memory, stores a generated check node value in the node memory, and stores a message generated by performing the node processing operation in the edge memory; a switch which switches outputs of the node memory and a vector node processor through a permutation operation; a parity check verifier which parity-checks an output from the node memory; and a controller which provides a control signal for controlling the vector node processor. COPYRIGHT: (C)2007,JPO&INPIT
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