发明名称 Method and apparatus for measuring die-level integrated circuit power variations
摘要 A system that determines power consumption on an IC chip. The system includes a test structure located within the IC chip variations which includes one or more gates which receives power from a power source, wherein each gate has a different drive strength, and wherein the output of each gate is coupled to a load through a corresponding switch. The system also includes a current-measuring mechanism coupled to the power supply which measures the current consumed by the gates. When a specific switch is activated, the output of a corresponding gate is coupled to the load, thereby causing the corresponding gate to drive the load. The current consumed by the corresponding gate is measured by the current measuring mechanism. The measured current can be used to determine the power consumption of the corresponding gate driving the load.
申请公布号 US2007188184(A1) 申请公布日期 2007.08.16
申请号 US20060354721 申请日期 2006.02.15
申请人 ATHAS WILLIAM C;LOPEZ-AGUADO HERBERT;HO THOMAS Y 发明人 ATHAS WILLIAM C.;LOPEZ-AGUADO HERBERT;HO THOMAS Y.
分类号 G01R31/02 主分类号 G01R31/02
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