发明名称 MANUFACTURING METHOD OF MULTILAYER WIRING BOARD
摘要 PROBLEM TO BE SOLVED: To propose a manufacturing method permitting the efficient manufacture of a multilayer wiring board and an improvement in the reliability of interlayer conduction connection of a stacked via or the like. SOLUTION: In an insulating resin substrate 1, there is formed a via hole 2 having the maximum diameter that is twice or less the thickness of a wiring conductor to be formed. In the insulating resin substrate with the via hole formed, a base metal layer 3 and a resist film 4 are formed. An electrolytic plating metal 5 is deposited by electrolytic plating to form a wiring conductor of a predetermined thickness and fill the via hole conductor at the same time. By stacking a predetermined kind and number of single-layer wiring boards 6 obtained in this way to press them, a multilayer wiring board is formed. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007208229(A) 申请公布日期 2007.08.16
申请号 JP20060051137 申请日期 2006.01.31
申请人 TAIYO YUDEN CO LTD 发明人 MIYAZAKI MASASHI;YOKOTA HIDEKI
分类号 H05K3/46 主分类号 H05K3/46
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