发明名称 |
LDPC decoding apparatus and method based on node memory |
摘要 |
An apparatus is provided for decoding a Low-Density Parity Check (LDPC) code in a communication system. In the LDPC decoding apparatus, an edge memory stores a message delivered through an edge between a variable node and a check node. A check node memory stores a node value. A node processor performs a node processing operation using information stored in at least one of the node memory and the edge memory, stores a check node value generated by performing the node processing operation in the node memory, and stores a message generated by performing the node processing operation in the edge memory. A switch switches outputs of the node memory and the node processor through a permutation operation. A parity check verifier parity-checks an output from the node memory. A controller provides a control signal for controlling the node processor. |
申请公布号 |
EP1819054(A2) |
申请公布日期 |
2007.08.15 |
申请号 |
EP20070101634 |
申请日期 |
2007.02.02 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
MOON, JUNE;BAE, SEUL-KI;YOON, SOON-YOUNG |
分类号 |
H03M13/11 |
主分类号 |
H03M13/11 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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