发明名称 |
On-chip test circuit for assessing chip integrity |
摘要 |
A semiconductor chip includes an active inner circuit; a die seal ring surrounding the active inner circuit; a first circuit structure fabricated at a first corner of the semiconductor chip outside the die seal ring and electrically connected to the die seal, wherein the first circuit structure has a first solder pad; and a second circuit structure fabricated at a second corner of the semiconductor chip outside the die seal ring and electrically connected to the die seal, wherein the second circuit structure has a second solder pad. |
申请公布号 |
US7256475(B2) |
申请公布日期 |
2007.08.14 |
申请号 |
US20050161304 |
申请日期 |
2005.07.29 |
申请人 |
UNITED MICROELECTRONICS CORP. |
发明人 |
JAO JUI-MENG;KUO CHIEN-LI |
分类号 |
H01L23/00 |
主分类号 |
H01L23/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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