发明名称 Wiring board design aiding apparatus, design aiding method, storage medium, and computer program
摘要 In a design aiding apparatus of the present invention, a plane clearance setting unit acquires information showing a predetermined margin, a component placement unit determines a placement area of a component such that, as seen in a lamination direction of a multilayer wiring board, at least one of the component and a pad connected to the component is included within a candidate area of a plane foil excluding a perimeter area, and a wiring unit determines a placement area of a wiring foil and a via in the same way that the placement area of the component is determined. Furthermore, in regard to a component, a component pad, a wiring foil, and a via whose placement areas have already been determined, a component placement inspection unit reports a design condition violation if the placement area of at least one of the component and the pad deviates outside the candidate area as seen in the lamination direction of the board, and a wiring inspection unit reports a design condition violation if the placement area of the wiring foil or the via deviates outside the candidate area as seen in the lamination direction of the board.
申请公布号 US7257792(B2) 申请公布日期 2007.08.14
申请号 US20020151368 申请日期 2002.05.20
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 NAKAYAMA TAKESHI;IKEDA HIROSHI;TANIMOTO SHINICHI
分类号 G06F17/50;H05K1/02;H05K3/00;H05K3/30;H05K3/46 主分类号 G06F17/50
代理机构 代理人
主权项
地址