MULTI BANK SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR ENABLING MULTI BANK THEREOF

摘要

A multi bank semiconductor memory device and a parallel bit test method thereof are provided to perform a test at a high speed insensitively to noise by enabling a bank in a zigzag type during a multi bank parallel test. A multi bank semiconductor memory device includes M banks. A bank enable signal generation part selects N banks not adjacent to each other among the M banks according to a test mode signal and a bank address signal and then enables the selected N banks. The bank enable signal generation part comprises a logic circuit to select banks arranged in zigzag. The logic circuit receives bank address signals to enable the banks.