| 摘要 |
A sense amplifier flip flop comprises a pre-charging portion connected between a first power voltage and first and second nodes and pre-charging the first and second nodes to a predetermined voltage in response to a clock signal, a differential input portion connected between a second power voltage and third and fourth nodes and receiving an input signal and an inverted input signal to generate a voltage difference between the input signal and the inverted input signal to the third and fourth nodes in response to the clock signal, a differential amplifying portion including a first inverter which includes a first pull-up transistor and a first pull-down transistor serial-connected between the first power voltage and the third node and inverts a signal of the second node to be outputted to the first node and a second inverter which includes a second pull-up transistor and a second pull-down transistor serial-connected between the first power voltage and the fourth node and inverts a signal of the first node to be outputted to the second node, amplifying the voltage difference between the third and fourth nodes, and applying first and second body bias voltages to the first and second pull-up transistors, a bias voltage generating portion generating the first and second bias voltages for adjusting an offset of an electric current flowing through the third and fourth nodes, and a latch portion for latching signals of the first and second nodes to output an output signal and an inverted output signal.
|
