发明名称 MIXED-SCALE ELECTRONIC INTERFACE
摘要 <p>Embodiments of the present invention are directed to mixed-scale electronic interfaces, included in integrated circuits and electronic devices, that provide for dense electrical interconnection between microscale features of a predominantly microscale or submicroscale layer (302, 308) and nanoscale features of a predominantly nanoscale layer (307, 313) . The predominantly nanoscale layer, in one embodiment of the present invention, comprises a tessellated pattern of submicroscale or microscale pads (306, 312) densely interconnected by nanowire junctions (318) between sets of parallel, closely spaced nanowire bundles (314, 316) . The predominantly submicroscale or microscale layer indued pins (304, 310) positioned complementarily to the submicroscale or microscale pads (306, 312) in the predominantly nanoscale layer.</p>
申请公布号 WO2007089522(A1) 申请公布日期 2007.08.09
申请号 WO2007US01988 申请日期 2007.01.26
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L. P.;SNIDER, GREGORY, S.;WILLIAMS, R., STANLEY 发明人 SNIDER, GREGORY, S.;WILLIAMS, R., STANLEY
分类号 G11C13/02 主分类号 G11C13/02
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