发明名称 Efficient configuration of daisy-chained programmable logic devices
摘要 In one embodiment, a programmable logic device includes: a multiplexer adapted to select a compressed configuration bitstream from a plurality of external serial interface memories; a serial interface processor adapted to command the bitstream selection by the multiplexer; and a bitstream decompressor adapted to decompress the selected configuration bitstream into a decompressed configuration bitstream.
申请公布号 US2007182445(A1) 申请公布日期 2007.08.09
申请号 US20060346817 申请日期 2006.02.03
申请人 CHEN ZHENG;BRITTON BARRY;SCHOLZ HAROLD 发明人 CHEN ZHENG (.;BRITTON BARRY;SCHOLZ HAROLD
分类号 H03K19/177 主分类号 H03K19/177
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