| 摘要 |
PROBLEM TO BE SOLVED: To attain the reduction of mounting area while suppressing the deterioration of the performance of a semiconductor device. SOLUTION: A semiconductor chip 4 is mounted on a lower layer base 13, and at the same time, a chip component 14 is mounted on an upper layer base 11. Further, the end of the upper layer base 11 is bent so that a connection lug 13c is folded, the semiconductor chip 4 is made to be inserted into an opening 15, the upper layer base 11 is laminated on the lower layer base 1, and a wiring patterns 2a, 13b are mutually connected by joining a connection lug 2d, 13c mutually. COPYRIGHT: (C)2007,JPO&INPIT
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