发明名称 SEMICONDUCTOR MEMORY DEVICE, ITS OPERATING METHOD, ITS CONTROL METHOD, MEMORY SYSTEM, AND ITS CONTROL METHOD
摘要 PROBLEM TO BE SOLVED: To make a semiconductor memory device having a low power consumption mode surely shift to the power saving mode and to release it from the low power without fail. SOLUTION: This semiconductor memory device has an entry circuit 1 and an inner voltage generator circuit 2. The inner voltage generator circuit 2 generates an inner voltage to supply it to a predetermined inner circuit 4 when activated. The inner voltage generator circuit 2 consumes a predetermined amount of power when working. The entry circuit 1 deactivates the inner voltage generator circuit 2 when receiving a predetermined signal from the outside. By deactivating the inner voltage generator circuit 2, the inner voltage is no longer generated reducing the power consumption. Accordingly, the chip is easily shifted to a low power consumption mode with the control signal from the outside. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007200550(A) 申请公布日期 2007.08.09
申请号 JP20070122320 申请日期 2007.05.07
申请人 FUJITSU LTD 发明人 FUJIOKA SHINYA;KAWAKUBO TOMOHIRO;NISHIMURA KOICHI;SATO MITSUNORI
分类号 G11C11/406;G11C11/401;G11C11/403;G11C11/4074 主分类号 G11C11/406
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