Power semiconductor component, has dielectric intermediate layer arranged between metal layers, where intermediate layer has less ductility than metal layers and laminar extension of intermediate layer is adapted to extension of surfaces

摘要

The component has internal bond wire connections (6) from a power semiconductor chip (7) to a component substrate and comprising bond wire ends (8) arranged on the chip`s contact surfaces. The surfaces are arranged on an upper metal layer (11) electrically connected with a lower metal layer (12). A dielectric intermediate layer (13) is arranged between the metal layers, where the layer (13) has less ductility than the metal layers and hardness of the layer (13) is higher than that of the metal layers. The laminar extension of the layer (13) is adapted to the laminar extension of the surfaces. An independent claim is also included for a method for manufacturing a power semiconductor component.