发明名称 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To reduce the deviation of a theoretical resistance value and an actually observed resistance value in a manufacturing method of a semiconductor device provided with a semiconductor resistance layer. SOLUTION: In the manufacturing method of the semiconductor device; an inter-layer insulating film 9 is formed on the entire surface on a semiconductor substrate 1, the inter-layer insulating film 9 is selectively etched thereafter, and contact holes 10 and 11 are formed for respectively partially exposing a polysilicon resistance layer 4, a source region 7 and a drain region 8. After defining a distance between the contact holes adjacent to each other on the polysilicon resistance layer 4 as the lengths L1 and L2 of resistance elements, the patterning dimension of the polysilicon resistance layer 4 is set. Then, ions are implanted through the contact hole 10, and low resistance regions 15a-15c (regions where impurities are introduced in a high concentration) are formed on the polysilicon resistance layer 4. Then, thermal treatment (annealing) after ion implantation is executed at a temperature lower than the temperature for thermal treatment for the source region and the drain region. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007201339(A) 申请公布日期 2007.08.09
申请号 JP20060020521 申请日期 2006.01.30
申请人 SANYO ELECTRIC CO LTD 发明人 NISHIBE EIJI;YATSUYANAGI TOSHISUKE
分类号 H01L21/822;H01L21/8234;H01L27/04;H01L27/06 主分类号 H01L21/822
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