| 摘要 |
PROBLEM TO BE SOLVED: To shorten manufacturing time by shortening the formation time of the opening portion of the upper portion of a fuse portion without inviting decrease in reliability by the cutting of the fuse portion and decrease in manufacturing yield in a semiconductor integrated circuit device in which multilayer wiring is provided corresponding to miniaturization and high integration. SOLUTION: The invention comprises an insulating film 41 formed on a semiconductor substrate 11 and a fuse portion 13 comprising a wiring layer formed on the insulating film 41. The wiring layer of the fuse portion 13 has a conducting metal layer 13A comprising at least copper. In addition, the wiring layer of the fuse portion 13 further comprises a barrier metal layer 40 formed on the insulating film 41. The conducting metal layer 13A is formed on the barrier metal layer 40. COPYRIGHT: (C)2007,JPO&INPIT
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