发明名称 HARDWARE-ERROR TOLERANT COMPUTING
摘要 <p>Embodiments include a computing system, a device, and a method. A computing system includes a processor subsystem having an adjustable operating parameter. The computing system also includes an information store operable to save a sequence of instructions. The computing system further includes a controller module. The controller module includes a monitor circuit for detecting an incidence of an operating-parameter-caused error corresponding to an execution of an instruction of the sequence of instructions by the processor subsystem. The controller further includes a control circuit for adjusting the adjustable operating parameter based upon an error- tolerant performance criterion.</p>
申请公布号 WO2007089498(A2) 申请公布日期 2007.08.09
申请号 WO2007US01904 申请日期 2007.01.24
申请人 SEARETE LLC;FERREN, BRAN;HILLIS, W., DANIEL;MANGIONE-SMITH, WILLIAM, HENRY;MYHRVOLD, NATHAN, P.;TEGREENE, CLARENCE, T.;WOOD, LOWELL, L., JR. 发明人 FERREN, BRAN;HILLIS, W., DANIEL;MANGIONE-SMITH, WILLIAM, HENRY;MYHRVOLD, NATHAN, P.;TEGREENE, CLARENCE, T.;WOOD, LOWELL, L., JR.
分类号 G06F9/44 主分类号 G06F9/44
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