发明名称 INTEGRATED DSP FOR A DC OFFSET CANCELLATION LOOP
摘要 <p>Processes and apparatuses for direct current (DC) offset cancellation using digital signal processing. Some embodiments of the invention are summarized in this section. In one embodiment, a circuit includes: an analog receiver; and a feedback circuit comprising a digital signal processor coupled with the analog receiver to generate a feedback signal to the analog receiver.</p>
申请公布号 WO2007089276(A1) 申请公布日期 2007.08.09
申请号 WO2006US30983 申请日期 2006.08.08
申请人 WU, SHUNFANG;TEO, SWEE-ANN 发明人 TEO, SWEE-ANN;WU, SHUNFANG
分类号 H03M1/06 主分类号 H03M1/06
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