发明名称 Concurrent code checker and hardware efficient high- speed I/O having built- in self- test and debug features
摘要 <p>Method, device, and system for testing for errors in high-speed input/output systems. System and device may include a concurrent code checker for checking for errors in encoded data packets through data packets static properties and dynamic properties of the data stream including the packets. Method may involve detecting invalid encoded packets using the data packets static properties and the dynamic properties of the data stream including the packets. Method for optimizing a design of a concurrent code checker logic using don't-care conditions, and concurrent code checker circuit having reduce logic element and semiconductor area requirements. </p>
申请公布号 EP1814234(A3) 申请公布日期 2007.08.08
申请号 EP20070250229 申请日期 2007.01.19
申请人 SILICON IMAGE, INC. 发明人 SUL, CHINSONG;CHOI, HOON;AHN, GIJUNG
分类号 H03M13/21;H03M13/09;H03M13/33 主分类号 H03M13/21
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