发明名称 Method of forming an integrated circuit with multi-length power transistor segments
摘要 A monolithic power integrated circuit fabricated on a semiconductor die includes a control circuit and a first output high voltage field-effect transistor (HVFET) having source and drain segments substantially equal to a first length. A second output HVFET has source and drain segments substantially equal to a second length. At least one of the first and second output HVFETs is coupled to the control circuit. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
申请公布号 US7253059(B2) 申请公布日期 2007.08.07
申请号 US20050323659 申请日期 2005.12.30
申请人 POWER INTEGRATIONS, INC. 发明人 BALAKRISHNAN BALU
分类号 H01L21/8232 主分类号 H01L21/8232
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