发明名称 Method and apparatus for use of high sampling frequency A/D converters for low frequency sampling
摘要 A method and apparatus for adding fill-in clock pulses to an analog to digital converters input clock signal between requests for analog data acquisition. The circuit that provides the fill-in clock pulses is able to detect a request for analog data acquisition, synchronously stop adding fill-in clock pulses, and track the request for data acquisition.
申请公布号 US7254203(B2) 申请公布日期 2007.08.07
申请号 US20020267927 申请日期 2002.10.08
申请人 CREDENCE SYSTEMS CORPORATION 发明人 GAVARDONI MAURIZIO;RICCA PAOLO DALLA
分类号 H04L7/00;G11B20/10;H03M1/10;H03M1/12 主分类号 H04L7/00
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