发明名称 Dual link DVI transmitter serviced by single phase locked loop
摘要 A dual link transmitter constructed according to the present invention employs a single Phase Locked Loop (PLL) to service both a primary link and a secondary link during dual link mode operations. The structure of the dual link transmitter includes both a primary link PLL and a secondary link PLL. The primary link PLL produces a primary link clock and the secondary link PLL produces a secondary link clock. During dual single link operations, the primary link clock is used to service the primary link while the secondary link clock is used to service the secondary link. However, during dual link operations, the primary link clock is used to service both the primary link and the secondary link.
申请公布号 US7254183(B2) 申请公布日期 2007.08.07
申请号 US20060516301 申请日期 2006.09.05
申请人 BROADCOM CORPORATION 发明人 BAUCH JEFFREY;BERARD RICHARD;PASQUALINO CHRISTOPHER R.;PETILLI STEPHEN G.
分类号 H04L27/04;G09G3/20;G09G5/00;H03L7/06;H04L7/00 主分类号 H04L27/04
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