发明名称 PACKAGE ON PACKAGE SUBSTRATE AND THE MANUFACTURING METHOD THEREOF
摘要 A POP(Package On Package) substrate and its manufacturing method are provided to increase the number of integrated chips without the increase of thickness by extending the distance between a top package and a bottom package using a metal bump and cavity of the bottom package. An inner circuit(12) is formed on a surface of a core substrate(10). A metal plate with a circuit pattern corresponding to an outer circuit(52) is formed on the surface of the core substrate via an insulating member(40). At this time, the circuit pattern is opposite to the inner circuit. A portion of the insulating member for forming the outer circuit is exposed to the outside by removing selectively the metal plate except a metal bump forming portion. A cavity(30) is formed on the resultant structure and the inner circuit is selectively exposed to the outside by removing partially the insulating member.
申请公布号 KR100749141(B1) 申请公布日期 2007.08.07
申请号 KR20060002950 申请日期 2006.01.11
申请人 SAMSUNG ELECTRO-MECHANICS CO., LTD. 发明人 KIM, JI EUN;KANG, MYUNG SAM;PARK, JUNG HYUN;JUNG, HOE KU
分类号 H01L23/12 主分类号 H01L23/12
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