发明名称 Methods And Apparatus For Managing Defective Processors Through Power Gating
摘要 Methods and apparatus provide for: selectively supplying a first source of power to a plurality of circuit blocks of a system using a plurality of gate circuits responsive to respective control signals provided by at least one control circuit; and providing a second source of power to operate the control circuit before the first source of power is available to the gate circuits such that the control signals are valid before such availability.
申请公布号 US2007176625(A1) 申请公布日期 2007.08.02
申请号 US20070620873 申请日期 2007.01.08
申请人 SONY COMPUTER ENTERTAINMENT INC. 发明人 HAYASHI ATSUSHI;HATAKEYAMA AKIYUKI;NIKI TAICHI;NISHINO YOICHI
分类号 G01R31/36 主分类号 G01R31/36
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