发明名称 REDUCED EDDY CURRENT LOSS IN LC TANK CIRCUITS
摘要 Placing inductors or resistors in parallel causes the combined value of inductance or resistance to decrease according to the parallel combination rule. This invention decreases the parasitic resistance of an inductor by placing several inductors in parallel. Furthermore, by careful placement of these inductors, the mutual inductance between these inductors can be used to increase the equivalent inductance value to a value near that of the original inductance value of a single inductor. Thus, it is possible to create an inductance with a much lower value of parasitic resistance. This invention allows the formation of high Q inductors and would be beneficial in any circuit design requiring inductances. Another aspect of this invention is that the coils can be partitioned to minimize eddy current losses. This invention can easily be implemented in a planar technology. Simulations of several tank circuits indicate that the power dissipation can be reduced 3 to 4 times when compared to conventional techniques.
申请公布号 US2007176704(A1) 申请公布日期 2007.08.02
申请号 US20070697908 申请日期 2007.04.09
申请人 LCTANK LLC 发明人 GABARA THADDEUS
分类号 H03B5/08;H03B5/18 主分类号 H03B5/08
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