发明名称 FIELD PROGRAMMABLE GATE ARRAY
摘要 PROBLEM TO BE SOLVED: To decrease the number of components and to lower the manufacturing cost by simplifying the constitution of a peripheral circuit. SOLUTION: An FPGA 10 which is loaded with configuration data from an ROM 20 and structures and executes a logic circuit, corresponding to the loaded configuration data includes a monitor section 14, which monitors whether the voltage Vcc of electric power supplied to the FPGA 10 exceeds a predetermined operation threshold Vth and a loading instruction section 15, which instructs new loading of configuration data from the ROM 20 once informed by the monitor part 14 that the voltage Vcc drops below the operation threshold Vth. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007194940(A) 申请公布日期 2007.08.02
申请号 JP20060011480 申请日期 2006.01.19
申请人 FUJI XEROX CO LTD 发明人 MISUMI AKIRA
分类号 H03K19/173;H01L21/82;H01L21/822;H01L27/04 主分类号 H03K19/173
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