发明名称 HIGH-SPEED INPUT/OUTPUT SIGNALING MECHANISM
摘要 Applicant's high-speed input/output signaling mechanism makes exclusive use of one or more processors (CPU) for polling. Device- bound perpetual polling (2) is initiated neither by the device nor by the processing application (1): it takes place independently of the on a CPU exclusively reserved for that task. Another aspect of the present invention is that communication with the I/O device is through the use of "DMA descriptors" (3) that reside in the main memory of the system. In an embodiment, a special purpose device that lacks the full architecture of a typical CPU may play the role of the exclusive polling CPU.
申请公布号 WO2007038606(A3) 申请公布日期 2007.08.02
申请号 WO2006US37687 申请日期 2006.09.26
申请人 BRUNO, JOHN;DEGIOANNI, LORIS 发明人 BRUNO, JOHN;DEGIOANNI, LORIS
分类号 G06F13/28;G06F13/00 主分类号 G06F13/28
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