| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a clamp circuit which has a short delay time and little current consumption. <P>SOLUTION: The clamp circuit 11 comprises an N channel type MOSFET Qn1 whose substrate terminal is grounded and a resistor R1. In the MOSFET Qn1, its drain terminal is connected to a signal input terminal VIN, and its source terminal is connected to an input side of an inverter circuit U1. The gate terminal of the MOSFET Qn1 is connected to a gate bias signal input terminal Vb and a gate bias signal is supplied. In the resistor R1, one end is connected to a connection point between the MOSFET Qn1 and the inverter circuit U1, and the other end is grounded. Input voltage of external data is clamped by a clamp circuit 11 to be output voltage V1 and outputted as output voltage Vo to a signal output terminal VOUT through a buffer composed of serially connected two inverter circuits U1 and U2. <P>COPYRIGHT: (C)2007,JPO&INPIT |
