发明名称 CLOCK DISTRIBUTION SYSTEM AND METHOD THEREOF
摘要 A clock distribution circuit and a method thereof. The clock distribution circuit comprises a comparator, a filter, a scaling unit, and an oscillator. The comparator compares a reference signal and a feedback signal to generate an error signal. The filter is coupled to the comparator and outputs a filtered signal based on the error signal. The scaling unit is coupled to the comparator, and scales down the filtered signal by a scaling factor to form a control signal. The oscillator is coupled to the scaling unit, and produces the feedback signal based on the control signal. And the scaling factor is less than 1.
申请公布号 US2007176693(A1) 申请公布日期 2007.08.02
申请号 US20060611267 申请日期 2006.12.15
申请人 VIA TECHNOLOGIES, INC. 发明人 LIN HSIAO-CHYI
分类号 H03L7/00 主分类号 H03L7/00
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