发明名称 Microprocessor and mobile communication terminal
摘要 A microprocessor used in a pair with a baseband processor for performing the baseband processing, is provided with a central processing unit for calculation processing, a counter capable of measuring time in the calculation processing by the central processing unit, and an interface which enables the baseband processor to read the counter. By making the baseband processor read the counter, the processing by the baseband processor is synchronized with the processing by the central processing unit in the microprocessor. Consequently, it is possible to establish synchronization between video and voice when the video processing and the voice processing are separately performed by different processors.
申请公布号 US7251500(B2) 申请公布日期 2007.07.31
申请号 US20040806375 申请日期 2004.03.23
申请人 RENESAS TECHNOLOGY CORP. 发明人 NAKAGAWA TETSUYA;ISHIDA KATSUHIKO;NAITO AKIRA
分类号 H04M1/00;H04M1/725;H04B7/26;H04M11/00;H04N7/14 主分类号 H04M1/00
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