OVERLAY VERNIER KEY AND THE METHOD FOR FABRICATING OVERLAY VERNIER KEY

摘要

An overlay vernier key and a method for forming the same are provided to prevent reading error due to a size difference between patterns formed in a cell region by closely disposing plural vernier patterns. A semiconductor substrate(100) comprises a cell region and a scribe lane region. Plural vernier patterns(112) are formed on the scribe lane of the semiconductor substrate in a ring pattern, and the vernier patterns form an edge side. The vernier patterns are closely disposed to generate a signal of intensity sufficient to be detected by an overlay measuring device. The vernier pattern has a size and a pitch which are equal to those of the pattern in the cell region.