发明名称 Method and apparatus for identifying a manufacturing problem area in a layout using a process-sensitivity model
摘要 One embodiment of the present invention provides a system that identifies an area in a mask layout which is likely to cause manufacturing problems. During operation, the system creates an on-target process model that models a semiconductor manufacturing process under nominal process conditions. The system also creates one or more off-target process models that model the semiconductor manufacturing process under one or more arbitrary process conditions. Next, the system computes a process-sensitivity model using the on-target process model and the off-target process models. The system then identifies a problem area in the mask layout using the process-sensitivity model. Identifying the problem area allows it to be corrected, which improves the manufacturability of the mask layout. Moreover, using the process-sensitivity model to identify the problem area reduces the computational time required to identify the problem area.
申请公布号 US7251807(B2) 申请公布日期 2007.07.31
申请号 US20050065409 申请日期 2005.02.24
申请人 发明人
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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