ESD protection that supports LVDS and OCT

摘要

Circuits are described that provide electrostatic discharge protection for I/O circuits that support the low voltage differential signaling (LVDS) and on-chip termination (OCT) standards. At least one additional transistor is connected across an I/O transistor. In the case of LVDS, a pair of stacked transistors is used in which the distance between the source/drain region and a well tap is considerably greater for the transistor connected to the I/O pad. A PMOS transistor and an NMOS transistor may also be connected in series between a first node such as a power supply node and the I/O pad. An OCT circuit is also disclosed in which the spacing between the source/drain region and a well tap in the OCT transistor is smaller than that in the I/O transistor.